1. Field of the Invention
The present invention generally relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly, to a semiconductor device that has a source and a drain, and a method of manufacturing the semiconductor device.
2. Description of the Related Art
FETs (Field Effect Transistors) are used in various fields. In a horizontal FET that has source electrodes, gate electrodes, and drain electrodes formed on the same face of a semiconductor substrate, the source electrodes, the gate electrodes, and the drain electrodes are arranged on the surface of the substrate in the gate length direction (the current flowing direction) of the FET. In a case where a FET having a large gate width is to be formed, each electrode is formed with fingers, and the fingers are connected with bus lines.
FIG. 1 shows an example case where such FETs are cascade-connected (connected in series). A first FET 10 and a second FET 20 are cascade-connected to each other on a semiconductor substrate. In the first FET 10, a source finger electrode 11, a gate finger electrode 12, a drain finger electrode 13, and the gate finger electrode 12 are provided in this order from the left. The source finger electrodes 11 are connected to a first FET source bus line 16. The gate finger electrodes 12 are connected to a first FET gate bus line 17. The drain finger electrodes 13 are connected to a first FET drain bus line 18. Likewise, the second FET 20 includes source finger electrodes 21, gate finger electrodes 22, drain finger electrodes 23, a second FET source bus line 26, a second FET gate bus line 27, and a second FET drain bus line 28. The first FET source bus line 16 and the second FET drain bus line 28 are connected to each other with a connecting portion 34. In this manner, the source of the first FET 10 and the drain of the second FET 20 are cascade-connected to each other.
FIG. 2 shows another example case where FETs are cascade-connected. In this example, the source finger electrodes 11 of the first FET 10 and the drain finger electrodes 23 of the second FET 20 are connected to a common bus line 32. The other aspects of the structure are the same as those of the structure shown in FIG. 1. As in this example, cascade-connected FETs may share a bus line.
In any case, the area of cascade-connected FETs is expected to be smaller.